Public:ARHUDFM Traction: Difference between revisions
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*Prio #1: Research and description of the principle of operation, description of the technology application, computer-added design | *Prio #1: Research and description of the principle of operation, description of the technology application, computer-added design | ||
*Prio #2: Technology functionality demo, specific functionality description, GUI demo, lab experimental setup | *Prio #2: Technology functionality demo, specific functionality description, GUI demo, lab experimental setup | ||
[[File:ARHUDFM Hardware Architecture v1.1.png|frameless|990x990px]] | |||
===Mechanical Engineering: Stephanie Kwolek<ref>Wikipedia, [[wikipedia:Stephanie_Kwolek|Stephanie Kwolek]]</ref> Team=== | ===Mechanical Engineering: Stephanie Kwolek<ref>Wikipedia, [[wikipedia:Stephanie_Kwolek|Stephanie Kwolek]]</ref> Team=== | ||
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''Schematics and PCBs for motherboard, projector, IFF Transponder, SDR, SDRS, PCSR, Digital sight'' | ''Schematics and PCBs for motherboard, projector, IFF Transponder, SDR, SDRS, PCSR, Digital sight'' | ||
*Prio #1: [TRL 5-6] Prototype: based on Raspberry Pi | *Prio #1: [TRL 5-6] Prototype: based on Raspberry Pi 5B, Texas Instruments DLPDLCR2000EVM | ||
*Prio #2: [TRL 7] MVP<sub>α</sub>: motherboard chipset Intel Z790<ref>Intel [https://www.intel.com/content/www/us/en/products/docs/chipsets/desktop-chipsets/z790-chipset-brief.html Z790 Chipset]</ref> or HM770<ref>Intel [https://www.intel.com/content/www/us/en/products/sku/232478/intel-hm770-chipset/specifications.html HM770 Chipset]</ref>, CPU Intel Core i7-14700K<ref>Intel, [https://www.intel.com/content/www/us/en/newsroom/news/intel-core-14th-gen-desktop-processors.html 14th Gen Core i7]</ref><ref>Intel [https://www.intel.com/content/www/us/en/products/docs/processors/core/13th-gen-core-mobile-brief.html Core i7 13th Gen HX (for mobile devices) Series], [https://www.intel.com/content/www/us/en/products/sku/232161/intel-core-i713850hx-processor-30m-cache-up-to-5-30-ghz/specifications.html?wapkw=i7-13850hx i7-13850HX Processor] </ref>, DLP PCB, SDRS PCB, IFF PCB | *Prio #2: [TRL 7] MVP<sub>α</sub>: motherboard chipset Intel Z790<ref>Intel [https://www.intel.com/content/www/us/en/products/docs/chipsets/desktop-chipsets/z790-chipset-brief.html Z790 Chipset]</ref> or HM770<ref>Intel [https://www.intel.com/content/www/us/en/products/sku/232478/intel-hm770-chipset/specifications.html HM770 Chipset]</ref>, CPU Intel Core i7-14700K<ref>Intel, [https://www.intel.com/content/www/us/en/newsroom/news/intel-core-14th-gen-desktop-processors.html 14th Gen Core i7]</ref><ref>Intel [https://www.intel.com/content/www/us/en/products/docs/processors/core/13th-gen-core-mobile-brief.html Core i7 13th Gen HX (for mobile devices) Series], [https://www.intel.com/content/www/us/en/products/sku/232161/intel-core-i713850hx-processor-30m-cache-up-to-5-30-ghz/specifications.html?wapkw=i7-13850hx i7-13850HX Processor] </ref>, DLP PCB, SDRS PCB, IFF PCB | ||
*Prio #3: [TRL 8] MVP<sub>β</sub>: SDR2 PCB, add-on (software defined antenna, optional battery, continuous wind capture impellers) | *Prio #3: [TRL 8] MVP<sub>β</sub>: SDR2 PCB, add-on (software defined antenna, optional battery, continuous wind capture impellers) |
Revision as of 14:15, 17 June 2024
Traction
![](/w/images/timeline/g45ixwe2u6mr2mxz7huw7sljzx31ln3.png)
TRL | NASA usage | DoD usage[1] | European Union |
---|---|---|---|
1 | Basic principles observed and reported | Scientific research begins to be translated into applied R&D | Basic principles observed |
2 | Technology concept and/or application formulated | Invention begins. Once basic principles are observed, practical applications can be invented | Technology concept formulated |
3 | Analytical and experimental critical function and/or characteristic proof-of concept | Active R&D is initiated. This includes analytical studies to produce code and laboratory studies to physically validate analytical predictions of separate technology HW/SW elements | Experimental proof of concept |
4 | Component and/or breadboard validation in laboratory environment | Basic technological components are integrated to establish that they will work together. System SW architecture development initiated to include interoperability, reliability, maintainability, extensibility, scalability and security issues | Technology validated in lab |
5 | Component and/or breadboard validation in relevant environment | The basic technological HW/SW components are integrated with reasonably realistic supporting elements so that they can be tested in a simulated environment | Technology validated in relevant environment (industrially relevant environment in the case of key enabling technologies) |
6 | System/subsystem model or prototype demonstration in a relevant environment (ground or space) | Examples include testing a prototype in a high-fidelity lab environment or a live/virtual experiment or in a simulated operational environment | Technology demonstrated in relevant environment (industrially relevant environment in the case of key enabling technologies) |
7 | System prototype demonstration in a space environment | Prototype near, or at, planned operational system. Algorithms run on processor of the operational environment integrated with actual external entities. SW support structure in place. SW releases are in distinct versions. Frequency and severity of SW deficiency reports do not significantly degrade functionality or performance. Verification, Validation and Accreditation (VV&A) completed | System prototype demonstration in operational environment |
8 | Actual system completed and "flight qualified" through test and demonstration (ground or space) | Technology and SW has been proven and demonstrated to work in its final form and under expected conditions. In almost all cases, TRL represents the end of true system development. Examples include developmental test and evaluation (T&E) of the system in its intended weapon system to determine if it meets design specifications | System complete and qualified |
9 | Actual system "flight proven" through successful mission operations | In almost all cases, this is the end of the last “bugfixing” aspects of system development. Examples include using the system under operational mission conditions. SW releases are production versions and configuration controlled. Frequency and severity of SW deficiencies are at a minimum | Actual system proven in operational environment (competitive manufacturing in the case of key enabling technologies; or in space) |
Roadmap
![](/w/images/timeline/qglkh2683826pvnbnzclf32gcu7xkck.png)
Design Development & Algorithm Architecture: Ada Lovelace[2] Team
Device design, GUI, VUI, Apps algorithms, Demos, Videos, Animations
- Prio #1: Research and description of the principle of operation, description of the technology application, computer-added design
- Prio #2: Technology functionality demo, specific functionality description, GUI demo, lab experimental setup
Mechanical Engineering: Stephanie Kwolek[3] Team
- Prio #1: [TRL 5-6] Prototype: based on 3D print, vacuum casting, vacuum unfusion
- Prio #2: [TRL 7] MVPα: vacuum casting, vacuum unfusion, injection moulding, manual assembly
- Prio #3: [TRL 8] MVPβ: vacuum casting, vacuum unfusion, injection moulding, manual assembly
- Prio #4: [TRL 9] MMPδ: manufacturing process automation, robotic assembly, add-ons (auto tourniquets, Care Under Fire set, SCBA integration, external aramid cover, continuous wind сapture impellers, software defined antenna, handheld metal re-radiation radar, optional battery, digital sight)
- Prio #5: MMPγ: manufacturing & assembly & logistic process upgrade
Optical Engineering: Katharine Blodgett[4] Team
Light guide, Beam splitting prisms, Dichroic mirror, Optical coatings, Fading pads
- Prio #1: [TRL 5-6] Prototype: optical scheme, light guide, dichroic mirror, fading pads
- Prio #2: [TRL 7] MVPα: beam splitting prisms for 3 cam sensors, optical coatings
- Prio #3: [TRL 8] MVPβ:
- Prio #4: [TRL 9] MMPδ:
- Prio #5: MMPγ:
Electronics Engineering: Ida Hyde[5] Team
Schematics and PCBs for motherboard, projector, IFF Transponder, SDR, SDRS, PCSR, Digital sight
- Prio #1: [TRL 5-6] Prototype: based on Raspberry Pi 5B, Texas Instruments DLPDLCR2000EVM
- Prio #2: [TRL 7] MVPα: motherboard chipset Intel Z790[6] or HM770[7], CPU Intel Core i7-14700K[8][9], DLP PCB, SDRS PCB, IFF PCB
- Prio #3: [TRL 8] MVPβ: SDR2 PCB, add-on (software defined antenna, optional battery, continuous wind capture impellers)
- Prio #4: [TRL 9] MMPδ: add-on (auto tourniquets, Care Under Fire set, handheld metal re-radiation radar)
- Prio #5: MMPγ: add-on (digital sight)
Software Development: Hedy Lamarr[10] Team
SDR, SDR Scan, RDF, Radar Detection, IFF, Networks, Remote control
- Prio #1: IFF, NET, RDF, RFDD, RWRC, SDRS
- Prio #2: P2P, RPAC, SDR2
- Prio #3: ANTC, EODD, PCSR
- Prio #4: APAR, FTRC, RBRC, UVRC
- Prio #5:
Software Development: Grace Hopper[11] Team
System Integration, DevOps, Maps, VBS, Sensors
- Prio #1: CAM, DISP, FPAD, GNSS, HT, INP, MMC, PTTH, SPOT, SRV, STT, SYS, VOVR
- Prio #2: ACC, ADM, FILE, DVC, MAP, NAV, PATH, REC, PLAY, SEC, STM
- Prio #3: TRSL
- Prio #4: VBS
- Prio #5:
Software Development: Evelyn Berezin[12] Team
IMS, Chat, Workgroups, Tasks, Mission planning
- Prio #1: CHAT, IMSG,
- Prio #2: CRPT, MSG, TSK, WGR
- Prio #3: ANLS, CAL, MAIL, PLAN
- Prio #4: WIKI
- Prio #5:
Software Development: Barbara Askins[13] Team
Computer Vision, Computer Audition, AI/ML, AI/DL, AI/NLP, AI/ANN
Networking: Margaret Hamilton[14] Team
Mentor Relations, Pitches, Updates
- Prio #1: Mentor Relations, Updates
- Prio #2: Business angels (pre-seed round)
- Prio #3: Business angels & Venture capital (seed round)
- Prio #4: Venture capital (round A)
- Prio #5:
Customer & Business Development: Barbara Liskov[15] Team
Requests, eMails, PR, Meetings
- Prio #1: Innovation programs research, requests, eMails, meetings
- Prio #2: Collaboration research, PR
- Prio #3: Proving ground testing
- Prio #4: Pilot programms
Future ideas
Further reading
FAQ
- Problems and strategic capabilities
- Target audience
- Market
- Product characteristics and features
- Major product milestones
- Stages of product evolution
- Lifetime value
- Comparison with nearest competitors
- Competitive advantages
- Hardware unit economy
- Estimated budget for the first year after R&D
- Team
- Road Map
- Financial Ask and Use of Funds
- Experience investing in defense startups
See also
Public External Sections: | Public Wiki Sections: | Public Wiki Sections: | Not-Public Wiki Sections: |
---|---|---|---|
Note: Unless otherwise stated, whenever the masculine gender is used, both men and women are included.
See also product details
Hardware Details: | Functional Apps Details: | Executive Apps Details: | Service Apps Details: |
---|---|---|---|
References
- ↑ Dr. John Niemela and Dr. Matthew Fisher, The Use of Technology Readiness Levels for Software Development
- ↑ Wikipedia, Ada Lovelace
- ↑ Wikipedia, Stephanie Kwolek
- ↑ Wikipedia, Katharine Burr Blodgett
- ↑ Wikipedia, Ida Henrietta Hyde
- ↑ Intel Z790 Chipset
- ↑ Intel HM770 Chipset
- ↑ Intel, 14th Gen Core i7
- ↑ Intel Core i7 13th Gen HX (for mobile devices) Series, i7-13850HX Processor
- ↑ Wikipedia, Hedy Lamarr
- ↑ Wikipedia, Grace Hopper
- ↑ Wikipedia, Evelyn Berezin
- ↑ Wikipedia, Barbara Askins
- ↑ Wikipedia, Margaret Hamilton
- ↑ Wikipedia, Barbara Liskov